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    Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation (1977)
    In:  CASI
    Details
    Publication Date: 2019-07-13
    Description: Progress in developing the application of ion implantation techniques to silicon gate CMOS/SOS processing is described. All of the conventional doping techniques such as in situ doping of the epi-film and diffusion by means of doped oxides are replaced by ion implantation. Various devices and process parameters are characterized to generate an optimum process by the use of an existing SOS test array. As a result, excellent circuit performance is achieved. A general description of the all ion implantation process is presented.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: NASA-CR-150607 , PRRL-77-CR-40
    Format: application/pdf
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