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  • Computer Systems  (3)
  • Chemistry  (1)
  • Communications and Radar
  • 1995-1999  (4)
  • 1925-1929
  • 1997  (4)
  • 1
    Electronic Resource
    Electronic Resource
    New York, NY [u.a.] : Wiley-Blackwell
    Biotechnology and Bioengineering 54 (1997), S. 583-594 
    ISSN: 0006-3592
    Keywords: trickle-bed biofilter ; mathematical model ; volatile organic compound (VOC) ; waste gas treatment ; biofiltration ; Chemistry ; Biochemistry and Biotechnology
    Source: Wiley InterScience Backfile Collection 1832-2000
    Topics: Biology , Process Engineering, Biotechnology, Nutrition Technology
    Notes: The objective of this article is to define and validate a mathematical model that desribes the physical and biological processes occurring in a trickle-bed air biofilter for waste gas treatment. This model considers a two-phase system, quasi-steady-state processes, uniform bacterial population, and one limiting substrate. The variation of the specific surface area with bacterial growth is included in the model, and its effect on the biofilter performance is analyzed. This analysis leads to the conclusion that excessive accumulation of biomass in the reactor has a negative effect on contaminant removal efficiency. To solve this problem, excess biomass is removed via full media fluidization and backwashing of the biofilter. The backwashing technique is also incorporated in the model as a process variable. Experimental data from the biodegradation of toluene in a pilot system with four packed-bed reactors are used to validate the model. Once the model is calibrated with the estimation of the unknown parameters of the system, it is used to simulate the biofilter performance for different operating conditions. Model predictions are found to be in agreement with experimental data. © 1997 John Wiley & Sons, Inc. Biotechnol Bioeng 54: 583-594, 1997.
    Additional Material: 8 Ill.
    Type of Medium: Electronic Resource
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  • 2
    Publication Date: 2019-07-10
    Description: Understanding the interplay between machines and problems is key to obtaining high performance on parallel machines. This paper investigates the interplay between programming paradigms and communication capabilities of parallel machines. In particular, we explicate the communication capabilities of the IBM SP-2 distributed-memory multiprocessor and the SGI PowerCHALLENGEarray symmetric multiprocessor. Two benchmark problems of bitonic sorting and Fast Fourier Transform are selected for experiments. Communication-efficient algorithms are developed to exploit the overlapping capabilities of the machines. Programs are written in Message-Passing Interface for portability and identical codes are used for both machines. Various data sizes and message sizes are used to test the machines' communication capabilities. Experimental results indicate that the communication performance of the multiprocessors are consistent with the size of messages. The SP-2 is sensitive to message size but yields a much higher communication overlapping because of the communication co-processor. The PowerCHALLENGEarray is not highly sensitive to message size and yields a low communication overlapping. Bitonic sorting yields lower performance compared to FFT due to a smaller computation-to-communication ratio.
    Keywords: Computer Systems
    Type: NAS-96-005
    Format: application/pdf
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  • 3
    Publication Date: 2019-07-13
    Description: Mesh adaption is a powerful tool for efficient unstructured- grid computations but causes load imbalance among processors on a parallel machine. We present a novel method to dynamically balance the processor workloads with a global view. This paper presents, for the first time, the implementation and integration of all major components within our dynamic load balancing strategy for adaptive grid calculations. Mesh adaption, repartitioning, processor assignment, and remapping are critical components of the framework that must be accomplished rapidly and efficiently so as not to cause a significant overhead to the numerical simulation. Previous results indicated that mesh repartitioning and data remapping are potential bottlenecks for performing large-scale scientific calculations. We resolve these issues and demonstrate that our framework remains viable on a large number of processors.
    Keywords: Computer Systems
    Type: NASA-CR-204487 , NAS 1.26:204487 , RIACS-TR-97-03 , Parallel Algorithms and Architectures; Jun 22, 1997 - Jun 25, 1997; Newport, RI; United States
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  • 4
    Publication Date: 2019-07-13
    Description: Partitioning unstructured graphs is central to the parallel solution of computational science and engineering problems. Spectral partitioners, such recursive spectral bisection (RSB), have proven effecfive in generating high-quality partitions of realistically-sized meshes. The major problem which hindered their wide-spread use was their long execution times. This paper presents a new inertial spectral partitioner, called HARP. The main objective of the proposed approach is to quickly partition the meshes at runtime in a manner that works efficiently for real applications in the context of distributed-memory machines. The underlying principle of HARP is to find the eigenvectors of the unpartitioned vertices and then project them onto the eigerivectors of the original mesh. Results for various meshes ranging in size from 1000 to 100,000 vertices indicate that HARP can indeed partition meshes rapidly at runtime. Experimental results show that our largest mesh can be partitioned sequentially in only a few seconds on an SP2 which is several times faster than other spectral partitioners while maintaining the solution quality of the proven RSB method. A parallel WI version of HARP has also been implemented on IBM SP2 and Cray T3E. Parallel HARP, running on 64 processors SP2 and T3E, can partition a mesh containing more than 100,000 vertices into 64 subgrids in about half a second. These results indicate that graph partitioning can now be truly embedded in dynamically-changing real-world applications.
    Keywords: Computer Systems
    Type: NASA-CR-204489 , NAS 1.26:204489 , RIACS-TR-97-01 , Parallel Algorithms and Architectures; Jun 22, 1997 - Jun 25, 1997; Newport, RI; United States
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