Electronic Resource
Woodbury, NY
:
American Institute of Physics (AIP)
Applied Physics Letters
51 (1987), S. 1251-1253
ISSN:
1077-3118
Source:
AIP Digital Archive
Topics:
Physics
Notes:
Effects of dynamic temperature nonuniformities during rapid thermal anneal (RTA) cycles of layered structures have been investigated. Silicon gate capacitors (4000 A(ring), As doped, polycrystalline Si on 175 A(ring) thermal oxide) were subjected to temperatures 450–1200 °C using incoherent radiation from W lamps. Capacitance-voltage measurements before and after RTA showed that due to RTA, interface traps were generated at temperatures as low as 600 °C, but that they were passivated by a standard post-metallization anneal. High-temperature RTA induced, in addition, a residual flatband voltage shift which was not removed by hydrogen anneal. The residual shift can be due to either a change in oxide fixed charges or changes in the characteristics of the polycrystalline Si gate. Faster temperature ramp rates increased the generation of interface traps confirming the dynamic nature of stress, but did not affect the residual shift.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1063/1.98695
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