ISSN:
1573-0484
Keywords:
Code scheduling
;
control-intensive programs
;
instruction-level parallel processing
;
ptimizing compile
;
profile information
;
speculative execution
;
superblock
;
superscalar processor
;
VLIW processor
Source:
Springer Online Journal Archives 1860-2000
Topics:
Computer Science
Notes:
Abstract A compiler for VLIW and superscalar processors must expose sufficient instruction-level parallelism (ILP) to effectively utilize the parallel hardware. However, ILP within basic blocks is extremely limited for control-intensive programs. We have developed a set of techniques for exploiting ILP across basic block boundaries. These techniques are based on a novel structure called thesuperblock. The superblock enables the optimizer and scheduler to extract more ILP along the important execution paths by systematically removing constraints due to the unimportant paths. Superblock optimization and scheduling have been implemented in the IMPACT-I compiler. This implementation gives us a unique opportunity to fully understand the issues involved in incorporating these techniques into a real compiler. Superblock optimizations and scheduling are shown to be useful while taking into account a variety of architectural features.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1007/BF01205185
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