ISSN:
1432-0541
Keywords:
Design automation
;
VLSI layout
;
Floorplanning
;
Floorplan sizing
;
Area minimization
;
NP-complete
;
Hierarchical floorplans
;
Pseudopolynomial
Source:
Springer Online Journal Archives 1860-2000
Topics:
Computer Science
,
Mathematics
Notes:
Abstract In this paper we study the area-minimization problem for hierarchical floorplans. We settle an open problem on the complexity of the area-minimization problem for hierarchical floorplans by showing it to be NP-complete (even for balanced hierarchical floorplans). We then present a new algorithm for determining the nonredundant realizations of a wheel. The algorithm has time costO(k 2 logk) and space cost0(k 2) if each block in a wheel has at mostk realizations. Based on the new algorithm for a wheel, we design a new pseudopolynomial area-minimization algorithm for hierarchical floorplans of order-5. The time and space costs of the algorithm are0((nM)2log(nM) and0(n 2 M), respectively, wheren is the number of basic blocks andM is an upper bound on the dimensions of the realizations of the basic blocks. The area-minimization algorithm was implemented. Experimental results show that it is very fast.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1007/BF01940881
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