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Fast, Massively Parallel Data Processors (1994)

Heaton, Robert A. ; Davis, ED ; Blevins, Donald W.

In: Other Sources

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Publication Date: 2019-07-13

Description: Proposed fast, massively parallel data processor contains 8x16 array of processing elements with efficient interconnection scheme and options for flexible local control. Processing elements communicate with each other on "X" interconnection grid with external memory via high-capacity input/output bus. This approach to conditional operation nearly doubles speed of various arithmetic operations.

Keywords: ELECTRONIC SYSTEMS

Type: GSC-13304 , NASA Tech Briefs (ISSN 0145-319X); 18; 8; P. 18

Format: text

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