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Spyder: A SURE (SUperscalar and REconfigurable) processor (1995)

Iseli, Christian ; Sanchez, Eduardo

Springer

The journal of supercomputing 9 (1995), S. 231-252

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ISSN: 1573-0484

Keywords: FPGA ; superscalar ; reconfigurable ; VLIW ; coprocessor

Source: Springer Online Journal Archives 1860-2000

Topics: Computer Science

Notes: Abstract A processor with three concurrent and data-shared execution units is described in detail in this paper. The functionality, resources, and data sizes of the execution units, implemented with Xilinx FPGA chips, are user-configurable in order to best fit the application being run. A Harvard-type architecture allows a very large instruction word (128 bits) and, therefore, a real parallel utilization and control of resources. We also present the results of the implementation of two applications, the game of Life and the Abingdon Cross benchmark.

Type of Medium: Electronic Resource

URL: http://dx.doi.org/10.1007/BF01212870

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