ISSN:
1573-0727
Keywords:
static test set compaction
;
support sets
;
recurrence subsequence
;
ATPG
Source:
Springer Online Journal Archives 1860-2000
Topics:
Electrical Engineering, Measurement and Control Technology
Notes:
Abstract Recent work observed that a subset of states are frequently visited during the simulation of a test set for a sequential circuit. Re-visiting a state implies that a cycle has been traversed in the state diagram. Removal of subsequence responsible for the cycle can lead to static compaction. The size of a cycle is the number of vectors in its subsequence. In this work, we extend the subsequence removal technique to provide significantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to identify more or larger cycles in a test set. State relaxation creates more opportunities for subsequence removal and hence, results in better compaction. Relaxation of a state is possible since not all memory elements in a finite state machine have to be specified for a state transition. The proposed technique has several advantages: (1) test sets that could not be compacted by existing subsequence removal techniques can now be compacted, (2) the size of cycles in a test set can be significantly increased by state relaxation and removal of the larger sized cycles leads to better compaction, (3) only two fault simulation passes are required as compared to trial and re-trial methods that require multiple fault simulation passes, and (4) significantly higher compaction is achieved in short execution times as compared to known subsequence removal methods. Experiments on ISCAS89 sequential benchmark circuits and several synthesized circuits show that the proposed technique consistently results in significantly higher compaction in short execution times.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1023/A:1008361817867
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