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Development of a readout system for the bar PANDA Micro Vertex Detector

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Published 25 January 2013 Published under licence by IOP Publishing Ltd
, , Citation S Esch et al 2013 JINST 8 C01043 DOI 10.1088/1748-0221/8/01/C01043

1748-0221/8/01/C01043

Abstract

The Micro Vertex Detector (MVD) is the innermost tracking detector of the bar PANDA (antiProton Annihilation at Darmstadt) experiment at the upcoming FAIR (Facility for Antiproton and Ion Research) facility in Darmstadt. The detector consists of four barrel and six disk layers of silicon pixel and strip sensors to obtain precise tracking of charged particles. For the development of a front-end ASIC a flexible and powerful readout system was designed to test different ASIC prototypes. We will present the upgrade of the FPGA-based Jülich Digital Readout System and measurements of the recent MVD pixel front-end prototype ToPix3. Tests of the implementation of the radiation hard GBT transfer protocol are also shown.

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10.1088/1748-0221/8/01/C01043