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Standardizing GPU Radiation Test ApproachesWhile some Graphical Processing Units (GPUs) are discrete components (i.e.GTX1050), others take the form of an IP block or embedded engine within a System on Chip (SoC) device such as the Qualcomm Snapdragon"TM" 820 which contains a Qualcomm Adreno"TM" 530 GPU. Within this device are various functional blocks which can be exercised with software payloads. NVidia's Jetson"TM" TX1 SoC is provided on a System on Module (SOM). Within it are Central Processing Unit (CPU) cores and an nVidia GPU which can be accessed similarly to a discrete GPU coprocessor. While the packaging is different, each one of these GPUs needs to be tested using the same standardized code.
Document ID
20180004820
Acquisition Source
Goddard Space Flight Center
Document Type
Presentation
Authors
Wyrwas, Edward J. (Lentech, Inc. Greenbelt, MD, United States)
Szabo, Carl (Arctic Slope Regional Corp. (ASRC) Federal Beltsville, MD, United States)
LaBel, Kenneth A. (NASA Goddard Space Flight Center Greenbelt, MD, United States)
Campola, Michael (NASA Goddard Space Flight Center Greenbelt, MD, United States)
O'Bryan, Martha (Arctic Slope Regional Corp. (ASRC) Federal Beltsville, MD, United States)
Date Acquired
August 30, 2018
Publication Date
July 16, 2018
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
GSFC-E-DAA-TN58575
Meeting Information
Meeting: Nuclear and Space Radiation Effects Conference (NSREC)
Location: Kona, HI
Country: United States
Start Date: July 16, 2018
End Date: July 20, 2018
Sponsors: Institute of Electrical and Electronics Engineers
Funding Number(s)
CONTRACT_GRANT: NNG13CR48C
Distribution Limits
Public
Copyright
Public Use Permitted.
Keywords
Single Event Effects (SEE)
NASA Electronic Parts and Packaging (NEPP) Program
graphics processing unit (GPU)

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