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  • 1
    Publication Date: 2018-06-06
    Description: We report on the observation of field effect transistor (FET) behavior in electrospun camphorsulfonic acid doped polyaniline(PANi)/polyethylene oxide(PE0) nanofibers. Saturation channel currents are observed at surprisingly low source/drain voltages. The hole mobility in the depletion regime is 1.4 x 10(exp -4) sq cm/V s while the 1-D charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating 1-D polymer FET's.
    Keywords: Electronics and Electrical Engineering
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  • 2
    Publication Date: 2019-07-19
    Description: Doped polyaniline blended with poly(ethylene oxide) has been electrospun in air to give fibers with diameters in the range 3 nm 200 nm. These fibers were captured on wafers of degenerately doped Si/SiO2 by placing the wafer in the path of the fiber jet formed during the electrospinning process. Individual fibers were contacted using shadow mask evaporation and were also captured on prepatterned wafers. Fibers having diameters greater than 100 nm show a slight increase in the conductivity as compared to the bulk film, while fibers with diameters less than 30 nm had lower conductivity than the bulk. Data on Scanning Conductance Microscopy along the length of individual fibers will be presented. For fibers where the diameter was not uniform, we found that below a certain diameter ( approx.15 nm) the fiber was less conducting as compared to thicker diameter fibers. Dependence of the fiber conductivity on a gate bias is underway and these results will also be presented.
    Keywords: Physics (General)
    Type: 2003 American Physical Society March Meeting; Mar 03, 2003 - Mar 07, 2003; Austin, TX; United States
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  • 3
    Publication Date: 2019-07-12
    Description: Methods for improving the corrosion inhibition of a metal or metal alloy substrate surface are provided wherein the substrate surface is coated with a polyaniline film. The polyaniline film coating is applied by contacting the substrate surface with a solution of polyaniline. The polyaniline is dissolved in an appropriate organic solvent and the solvent is allowed to evaporate from the substrate surface yielding the polyaniline film coating.
    Keywords: Mechanical Engineering
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  • 4
    Publication Date: 2019-07-12
    Description: A family of experimental highly miniaturized field-effect transistors (FETs) is based on exploitation of the electrical properties of nanofibers of polyaniline/ polyethylene oxide (PANi/PEO) doped with camphorsulfonic acid. These polymer-based FETs have the potential for becoming building blocks of relatively inexpensive, low-voltage, highspeed logic circuits that could supplant complementary metal oxide/semiconductor (CMOS) logic circuits. The development of these polymerbased FETs offers advantages over the competing development of FETs based on carbon nanotubes. Whereas it is difficult to control the molecular structures and, hence, the electrical properties of carbon nanotubes, it is easy to tailor the electrical properties of these polymerbased FETs, throughout the range from insulating through semiconducting to metallic, through choices of doping levels and chemical manipulation of polymer side chains. A further advantage of doped PANi/PEO nanofibers is that they can be made to draw very small currents and operate at low voltage levels, and thus are promising for applications in which there are requirements to use many FETs to obtain large computational capabilities while minimizing power demands. Fabrication of an experimental FET in this family begins with the preparation of a substrate as follows: A layer of silicon dioxide between 50 and 200 nm thick is deposited on a highly doped (resistivity 0.01 W.cm) silicon substrate, then gold electrodes/contact stripes are deposited on the oxide. Next, one or more fibers of camphorsulphonic acid-doped PANi/PEO having diameters of the order of 100 nm are electrospun onto the substrate so as to span the gap between the gold electrodes (see Figure 1). Figure 2 depicts measured current-versus-voltage characteristics of the device of Figure 1, showing that saturation channel currents occur at source-todrain potentials that are surprisingly low, relative to those of CMOS FETs. The hole mobility in the depletion regime in this transistor was found to be 1.4 10(exp -4) sq cm/(V.s), while the one-dimensional charge density at zero gate bias was estimated to be approximately one hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content of the fibers is expected to enhance the properties of future versions of this transistor.
    Keywords: Man/System Technology and Life Support
    Type: LEW-17933-1 , NASA Tech Briefs, June 2006; 12-13
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