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Gain limitations of scaled InP/InGaAs heterojunction bipolar transistors (2001)

Rohner, M. ; Schnyder, I. ; Huber, D. ; [et al.]

[S.l.] : American Institute of Physics (AIP)

Journal of Applied Physics 89 (2001), S. 6444-6448

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ISSN: 1089-7550

Source: AIP Digital Archive

Topics: Physics

Notes: We investigate a current gain degradation mechanism in self-aligned InP/InGaAs heterojunction bipolar transistors. We show that surface level pinning at the emitter sidewall gives rise to a peripheral emitter injection current into the base which increases the base current due to electrons recombining at the base contacts. The surface charge at the extrinsic base surface causes the formation of a conducting channel which further enhances the electron flow from the emitter to the base contacts. Two-dimensional numerical simulations of the emitter region combined with Monte-Carlo simulations of the injection process at the abrupt base-emitter heterojunction are in good agreement with the measurements. This effect will be especially severe for submicron emitter widths where the emitter perimeter to emitter area ratio is large. © 2001 American Institute of Physics.

Type of Medium: Electronic Resource

URL: http://dx.doi.org/10.1063/1.1369406

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