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  • 1
    Electronic Resource
    Electronic Resource
    Springer
    Analog integrated circuits and signal processing 25 (2000), S. 347-350 
    ISSN: 1573-1979
    Keywords: analog signal processing ; CMOS ; low voltage ; composite transistor ; multiplier
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract A new low voltage high-speed CMOS composite transistor is presented. It lowers supply voltage down to |V t |+2 V ds,sat and considerably extends input voltage operating range and achieves high speed operation. As an application example, it is used in the design of a high-speed four quadrant analog multiplier. Simulations results using MOSIS 2 μm N-well process with a 3 V supply are given.
    Type of Medium: Electronic Resource
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  • 2
    Electronic Resource
    Electronic Resource
    Springer
    Analog integrated circuits and signal processing 20 (1999), S. 119-128 
    ISSN: 1573-1979
    Keywords: analog signal processing ; MOS analog circuit ; MOS OTA ; low voltage power supply ; low power dissipation
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper proposes a novel low power dissipation technique for a low voltage OTA. A conventional low power OTA with a class AB input stage is not suitable for a low voltage operation (±1.5 V supply voltages), because it uses composite transistors (referred to CMOS pair) which has a large threshold voltage. On the other hand, the tail-current type OTA needs a large tail-current value to obtain a sufficient input range at the expense of power dissipation. Therefore, the conventional tail-current type OTA has a trade-off between the input range and the power dissipation to the tail-current value. The trade-off can be eliminated by the proposed technique. The technique exploits negative feedback control including a current amplifier and a minimum current selecting circuit. The proposed technique was used on Wang's OTA to create another OTA, named Low Power Wang's OTA. Also, SPICE simulations are used to verify the efficiency of Low Power Wang's OTA. Although the static power of Low Power Wang's OTA is 122 μW, it has a sufficient input range, whereas conventional Wang's OTA needs 703 μW to obtain a sufficient input range. However, we can say that as the input signal gets larger, the power of Low Power Wang's OTA becomes larger.
    Type of Medium: Electronic Resource
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  • 3
    Electronic Resource
    Electronic Resource
    Springer
    Analog integrated circuits and signal processing 25 (2000), S. 281-290 
    ISSN: 1573-1979
    Keywords: analog signal processing ; MOS analog circuit ; analog multiplier ; mobility reduction ; body effect
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper proposes a novel CMOS analog multiplier. As its significant merit, it is free from mobility reduction and body effect. Thus, the proposed multiplier is expected to have good linearity, comparing with conventional multipliers. Four transistors operating in the linear region constitute the input cell of the multiplier. Their sources and backgates are connected to the ground to cancel the body effect. Their gates are fixed to the same bias voltage to remove the effect of the mobility reduction. Input signals are applied to the drains of the input cell transistors through modified nullors. The simulation results show that THD is less than 0.8% for 0.6 Vp-p input signal at 2.5 V supply voltage, and that the 3 dB bandwidth is up to about 13.3 MHz.
    Type of Medium: Electronic Resource
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