ALBERT

Description: Semiconductor device profiles are determined by the characteristics of both etching and deposition processes. In particular, a highly anisotropic etch is required to achieve vertical sidewalls. However, etching is comprised of both anisotropic and isotropic components, due to ion and neutral fluxes, respectively. In Ar/Cl2 plasmas, for example, neutral chlorine reacts with the Si surfaces to form silicon chlorides. These compounds are then removed by the impinging ion fluxes. Hence the directionality of the ions (and thus the ion angular distribution function, or IAD), as well as the relative fluxes of neutrals and ions determines the amount of undercutting. One method of modeling device profile evolution is to simulate the moving solid-gas interface between the semiconductor and the plasma as a string of nodes. The velocity of each node is calculated and then the nodes are advanced accordingly. Although this technique appears to be relatively straightforward, extensive looping schemes are required at the profile corners. An alternate method is to use level set theory, which involves embedding the location of the interface in a field variable. The normal speed is calculated at each mesh point, and the field variable is updated. The profile comers are more accurately modeled as the need for looping algorithms is eliminated. The model we have developed is a 2-D Level Set Profile Evolution Simulation (LSPES). The LSPES calculates etch rates of a substrate in low pressure plasmas due to the incident ion and neutral fluxes. For a Si substrate in an Ar/C12 gas mixture, for example, the predictions of the LSPES are identical to those from a string evolution model for high neutral fluxes and two different ion angular distributions.(2) In the figure shown, the relative neutral to ion flux in the bulk plasma is 100 to 1. For a moderately isotropic ion angular distribution function as shown in the cases in the left hand column, both the LSPES (top row) and rude's string method (bottom row) predict tapered profiles. The LSPES uses an AD with a FWHM = 13.5 degrees, and rude's model uses a ratio of sheath voltage to ion temperature of 50. The more anisotropic IADs produce profiles with more vertical sidewalls and a wider bottom surface, as shown in the right hand column. Here, the LSPES has an AD with a FWHM = 2 degrees, and rude's model uses a ratio of 500 of sheath voltage to ion temperature. The agreement between the LSPES and rude's model is excellent in both cases. We will present etching profiles generated by the LSPES, including calculations of the re-emitted fluxes of both neutrals and ions off of the profile walls. In addition, we will show the effect of geometric structures (overhangs, etc.) on the etching profiles. Other physical aspects, such as surface diffusion, will also be included in the model.

Description: Etching of semiconductor materials is reliant on plasma properties. Quantities such as ion and neutral fluxes, both in magnitude and in direction, are often determined by reactor geometry (height, radius, position of the coils, etc.) In order to obtain accurate etching profiles, one must also model the plasma as a whole to obtain local fluxes and distributions. We have developed a set of three models that simulates C12 plasmas for etching of silicon, ion and neutral trajectories in the plasma, and feature profile evolution. We have found that the location of the peak in the ion densities in the reactor plays a major role in determining etching uniformity across the wafer. For a stove top coil inductively coupled plasma (ICP), the ion density is peaked at the top of the reactor. This leads to nearly uniform neutral and ion fluxes across the wafer. A side coil configuration causes the ion density to peak near the sidewalls. Ion fluxes are thus greater toward the wall's and decrease toward the center. In addition, the ions bombard the wafer at a slight angle. This angle is sufficient to cause slanted profiles, which is highly undesirable.

Description: To better utilize its vast collection of heterogeneous resources that are geographically distributed across the United States, NASA is constructing a computational grid called the Information Power Grid (IPG). This paper describes various tools and techniques that we are developing to measure and improve the performance of a broad class of NASA applications when run on the IPG. In particular, we are investigating the areas of grid benchmarking, grid monitoring, user-level application scheduling, and decentralized system-level scheduling.