Publication Date:
2019-06-28
Description:
An approach to the fault analysis of digital systems is proposed which combines faults, hardware, and software into one overall model. The model is useful for the consideration of intermittent/transient faults, and supports a new method, based on the concept of a containment set, for realizing transient fault tolerance without massive redundancy. The model also serves as the basis for a new approach to system fault tolerance evaluation and validation using a transition matrix defined in terms of the containment set. The application of upset theory to the design of transient fault-tolerant microprocessor controllers is discussed.
Keywords:
CYBERNETICS
Type:
IEEE Transactions on Computers; C-31; July 198
Format:
text
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