ISSN:
1573-1979
Keywords:
transceiver
;
CMOS
;
front-end
;
wireless
;
RF
Source:
Springer Online Journal Archives 1860-2000
Topics:
Electrical Engineering, Measurement and Control Technology
Notes:
Abstract This work describes the design and realization of a low voltage single-chip wireless transceiver front-end in a standard 0.25 μm CMOS technology. The presented prototype integrates the LNA, down-converters, VCO, quadrature generator, up-converter and pre-amplifier on a single die. A high level of integration is achieved by using a low-IF topology for reception, a direct quadrature up-conversion topology for transmission and an oscillator with on-chip integrated inductor. The final objective of this design is to develop a complete transceiver system for wireless communications at 1.8 GHz that can be built with a minimum of surrounding components: only an antenna, a duplexer, a power amplifier and a baseband signal processing chip. The presented circuit consumes 240 mW from a 2.5 V supply and occupies a die area of 8.6 mm2.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1023/A:1008326020149
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