ISSN:
1531-5878
Source:
Springer Online Journal Archives 1860-2000
Topics:
Electrical Engineering, Measurement and Control Technology
Notes:
Abstract With the advent of wafer-scale integration (WSI), the placement of several “processors” on a single VLSI wafer is becoming a realistic possibility. To avoid the problems of a very low yield inherent in any silicon component of (very) large area, redundant components will be used. In this article we examine three different solutions for reconnecting the nonfaulty processors so that the resulting network is a square grid. We then present results of simulations for various percentages of faulty processors, which show that a small amount of redundancy is the interprocessors paths and a simple back-track based algorithm can produce a resulting grid that, while not necessarily optimal, includes most of the nonfaulty processors.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1007/BF01598958
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