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  • 1
    Publication Date: 2019-07-12
    Description: In this innovation, a digital downconverter has been created that produces a large (16 or greater) number of output channels of smaller bandwidths. Additionally, this design has the flexibility to tune each channel independently to anywhere in the input bandwidth to cover a wide range of output bandwidths (from 32 MHz down to 1 kHz). Both the flexibility in channel frequency selection and the more than four orders of magnitude range in output bandwidths (decimation rates from 32 to 640,000) presented significant challenges to be solved. The solution involved breaking the digital downconversion process into a two-stage process. The first stage is a 2 oversampled filter bank that divides the whole input bandwidth as a real input signal into seven overlapping, contiguous channels represented with complex samples. Using the symmetry of the sine and cosine functions in a similar way to that of an FFT (fast Fourier transform), this downconversion is very efficient and gives seven channels fixed in frequency. An arbitrary number of smaller bandwidth channels can be formed from second-stage downconverters placed after the first stage of downconversion. Because of the overlapping of the first stage, there is no gap in coverage of the entire input bandwidth. The input to any of the second-stage downconverting channels has a multiplexer that chooses one of the seven wideband channels from the first stage. These second-stage downconverters take up fewer resources because they operate at lower bandwidths than doing the entire downconversion process from the input bandwidth for each independent channel. These second-stage downconverters are each independent with fine frequency control tuning, providing extreme flexibility in positioning the center frequency of a downconverted channel. Finally, these second-stage downconverters have flexible decimation factors over four orders of magnitude The algorithm was developed to run in an FPGA (field programmable gate array) at input data sampling rates of up to 1,280 MHz. The current implementation takes a 1,280-MHz real input, and first breaks it up into seven 160-MHz complex channels, each spaced 80 MHz apart. The eighth channel at baseband was not required for this implementation, and led to more optimization. Afterwards, 16 second stage narrow band channels with independently tunable center frequencies and bandwidth settings are implemented A future implementation in a larger Xilinx FPGA will hold up to 32 independent second-stage channels.
    Keywords: Man/System Technology and Life Support
    Type: NPO-47431 , NASA Tech Briefs, July 2013; 12-13
    Format: application/pdf
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  • 2
    Publication Date: 2019-07-12
    Description: An upgrade to the very-long-baseline-interferometry (VLBI) science receiver (VSR) a radio receiver used in NASA's Deep Space Network (DSN) is currently being implemented. The current VSR samples standard DSN intermediate- frequency (IF) signals at 256 MHz and after digital down-conversion records data from up to four 16-MHz baseband channels. Currently, IF signals are limited to the 265-to-375-MHz range, and recording rates are limited to less than 80 Mbps. The new digital front end, denoted the Wideband VSR, provides improvements to enable the receiver to process wider bandwidth signals and accommodate more data channels for recording. The Wideband VSR utilizes state-of-the-art commercial analog-to-digital converter and field-programmable gate array (FPGA) integrated circuits, and fiber-optic connections in a custom architecture. It accepts IF signals from 100 to 600 MHz, sampling the signal at 1.28 GHz. The sample data are sent to a digital processing module, using a fiber-optic link for isolation. The digital processing module includes boards designed around an Advanced Telecom Computing Architecture (ATCA) industry-standard backplane. Digital signal processing implemented in FPGAs down-convert the data signals in up to 16 baseband channels with programmable bandwidths from 1 kHz to 16 MHz. Baseband samples are transmitted to a computer via multiple Ethernet connections allowing recording to disk at rates of up to 1 Gbps.
    Keywords: Man/System Technology and Life Support
    Type: NPO-41191 , NASA Tech Briefs, September 2006; 63
    Format: application/pdf
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  • 3
    Publication Date: 2019-07-12
    Description: A recently developed breadboard version of an advanced signal processor for arraying many antennas in NASA s Deep Space Network (DSN) can accept inputs in a 500-MHz-wide frequency band from six antennas. The next breadboard version is expected to accept inputs from 16 antennas, and a following developed version is expected to be designed according to an architecture that will be scalable to accept inputs from as many as 400 antennas. These and similar signal processors could also be used for combining multiple wide-band signals in non-DSN applications, including very-long-baseline interferometry and telecommunications. This signal processor performs functions of a wide-band FX correlator and a beam-forming signal combiner. [The term "FX" signifies that the digital samples of two given signals are fast Fourier transformed (F), then the fast Fourier transforms of the two signals are multiplied (X) prior to accumulation.] In this processor, the signals from the various antennas are broken up into channels in the frequency domain (see figure). In each frequency channel, the data from each antenna are correlated against the data from each other antenna; this is done for all antenna baselines (that is, for all antenna pairs). The results of the correlations are used to obtain calibration data to align the antenna signals in both phase and delay. Data from the various antenna frequency channels are also combined and calibration corrections are applied. The frequency-domain data thus combined are then synthesized back to the time domain for passing on to a telemetry receiver
    Keywords: Man/System Technology and Life Support
    Type: NPO-43646 , NASA Tech Briefs, March 2008; 6
    Format: application/pdf
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  • 4
    Publication Date: 2019-07-13
    Description: This paper describes the implementation of a Digital Signal Processing (DP) subsystem for a single Long Wavelength Array (LWA) station.12 The LWA is a radio telescope that will consist of many phased array stations. Each LWA station consists of 256 pairs of dipole-like antennas operating over the 10-88 MHz frequency range. The Digital Signal Processing subsystem digitizes up to 260 dual-polarization signals at 196 MHz from the LWA Analog Receiver, adjusts the delay and amplitude of each signal, and forms four independent beams. Coarse delay is implemented using a first-in-first-out buffer and fine delay is implemented using a finite impulse response filter. Amplitude adjustment and polarization corrections are implemented using a 2x2 matrix multiplication
    Keywords: Communications and Radar
    Type: IEEEAC Paper 1525 , 2011 IEEE Aerospace Conference; Mar 06, 2011 - Mar 12, 2011; Big Sky, MT; United States
    Format: text
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  • 5
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    In:  Other Sources
    Publication Date: 2019-07-13
    Description: Design of digital frequency down-converters simplified by eliminating need for both high-speed number-controlled oscillators (NCOs) and mixer-multipliers, and implementing functions via multiplication coefficients of finite-impulse-response (FIR) filters. Simplification depends on particular choices of operating frequencies. Simplified designs implemented with commercial FIR integrated circuits.
    Keywords: ELECTRONIC SYSTEMS
    Type: NPO-19438 , NASA Tech Briefs (ISSN 0145-319X); 19; 7; P. 40
    Format: text
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  • 6
    Publication Date: 2019-07-12
    Description: The Radio Science Receiver (RSR) is an open-loop receiver installed in NASA s Deep Space Network (DSN), which digitally filters and records intermediate-frequency (IF) analog signals. The RSR is an important tool for the Cassini Project, which uses it to measure perturbations of the radio-frequency wave as it travels between the spacecraft and the ground stations, allowing highly detailed study of the composition of the rings, atmosphere, and surface of Saturn and its satellites.
    Keywords: Space Communications, Spacecraft Communications, Command and Tracking
    Type: NPO-46289 , NASA Tech Briefs, December 2009; 5
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  • 7
    Publication Date: 2019-07-13
    Description: The Portable Radio Science Receiver (PRSR) is a suitcase-sized open-loop digital receiver designed to be small and easy to transport so that it can be deployed quickly and easily anywhere in the world. The PRSR digitizes, downconverts, and filters using custom hardware, firmware, and software. Up to 16 channels can be independently configured and recorded with a total data rate of up to 256 Mbps. The design and implementation of the system's hardware, firmware, and software is described. To minimize costs and time to deployment, our design leveraged elements of the hardware, firmware, and software designs from the existing full-sized operational (non-portable) Radio Science Receivers (RSR) and Wideband VLBI Science Receivers (WVSR), which have successfully supported flagship NASA deep space missions at all Deep Space Network (DSN) sites. We discuss a demonstration of the PRSR using VLBI, with one part per billion angular resolution: 1 nano-radian / 200 ?as synthesized beam. This is the highest resolution astronomical instrument ever operated solely from the Southern Hemisphere. Preliminary results from two sites are presented, including the European Space Agency (ESA) sites at Cebreros, Spain and Malargue, Argentina. Malargue's South American location is of special interest because it greatly improves the geometric coverage for spacecraft navigation in the Southern Hemisphere and will for the first time provide coverage to the 1/4 of the range of declination that has been excluded from reference frame work at Ka-band.
    Keywords: Space Communications, Spacecraft Communications, Command and Tracking
    Type: 2013 IEEE Aerospace Conference; Mar 02, 2013 - Mar 09, 2013; Big Sky, MT; United States
    Format: text
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