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  • 1
    Electronic Resource
    Electronic Resource
    s.l. ; Stafa-Zurich, Switzerland
    Advances in science and technology Vol. 54 (Sept. 2008), p. 474-479 
    ISSN: 1662-0356
    Source: Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
    Topics: Natural Sciences in General , Technology
    Notes: There is a current upsurge in research on devices with nanoparticles embedded indielectrics. Such structures can operate as memories with high speed, high density, low voltage andlow cost. Here, we report on hybrid gold nanoparticle-based metal-insulator-semiconductor (MIS)memory devices combining silicon technology and organic thin film deposition. The nanoparticlesare deposited using a self-assembly technique at room temperature onto a 4.5 nm thermal siliconoxide layer. A 40 nm thin film of pentacene (deposited by flash thermal evaporation),polymethylmethacrylate (spin coated) and cadmium arachidate (deposited using the Langmuir-Blodgett technique) are used as insulators. Distinct capacitance-voltage (C-V) hysteresis is observedwith a memory window that increases linearly with increasing voltage programming range.Clockwise and anticlockwise hysteresis in devices based on p-type and n-type silicon, respectivelyare observed, indicating that charges are injected from the top electrode to the nanoparticles ratherthan tunnelling through the thin SiO2 layer. However, thermal growth of SiO2 at a temperaturebelow 800 °C resulted in a hysteresis in the opposite direction. The detailed electrical behaviour ofthe MIS devices will be discussed
    Type of Medium: Electronic Resource
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  • 2
    Publication Date: 2019-09-25
    Description: To investigate the behaviour of the organic memory transistors, graphene oxide (GO) was utilized as the floating gate in 6,13-Bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene)-based organic memory transistors. A cross-linked, off-centre spin-coated and ozone-treated poly(methyl methacrylate) (cPMMA) was used as the insulating layer. High mobility and negligible hysteresis with very clear transistor behaviour were observed for the control transistors. On the other hand, memory transistors exhibited clear large hysteresis which is increased with increasing programming voltage. The shifts in the threshold voltage of the transfer characteristics as well as the hysteresis in the output characteristics were attributed to the charging and discharging of the floating gate. The counter-clockwise direction of hysteresis indicates that the process of charging and discharging the floating gate take place through the semiconductor/insulator interface. A clear shift in the threshold voltage was observed when different voltage pulses were applied to the gate. The non-volatile behaviour of the memory transistors was investigated in terms of charge retention. The memory transistors exhibited a large memory window (~30 V), and high charge density of (9.15 × 1011 cm−2).
    Electronic ISSN: 2072-666X
    Topics: Mechanical Engineering, Materials Science, Production Engineering, Mining and Metallurgy, Traffic Engineering, Precision Mechanics
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