Publication Date:
2013-08-31
Description:
In testing sequential circuits, internal faults in the storage elements (SE's) are sometimes modeled as stuck-at faults in the combinational circuits surrounding the SE. The detection of some transistor-level faults that cannot be modeled as stuck-at are considered. These feed-through faults cause the cell to become either data-feed-through, which makes the cell combinational, or clock-feed-through, which causes the clock signal or its complement to appear at the output. Under such faults, the cell does not function as a memory element. Here it is shown that such faults may or may not be detected depending on delays involved. Conditions under which race-ahead occurs are identified.
Keywords:
ELECTRONICS AND ELECTRICAL ENGINEERING
Type:
Idaho Univ., The 1992 4th NASA SERC Symposium on VLSI Design; 5 p
Format:
application/pdf
Permalink