ISSN:
1662-9752
Source:
Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
Topics:
Mechanical Engineering, Materials Science, Production Engineering, Mining and Metallurgy, Traffic Engineering, Precision Mechanics
Notes:
Scaling of CMOS structures through the deep sub-micron range and into the nano-scalerange (〈 100 nm) has posed a number of difficult problems for processing technology. One maintechnological approach has been to improve the uniformity and conformality of deposited layers. Asthe Atomic Layer Deposition (ALD) has already demonstrated that it can overcome many of thelimitations of current film deposition techniques, it seems to be the solution for very conformallayers of high quality on severe topography. The ALD method has been developed already in the1970’s by Tumo Suntola and co-workers [1-4]. However, it has been in the past a rather unusedmethod in the semiconductor industry. This has recently changed. During the last couple of years,the large semiconductor companies have spent a lot of effort in the utilization of ALD, but untilnow a production worthy ALD tool with low ‘Cost-of-Ownership’ (CoO) numbers was notavailable. One reason for the late introduction of ALD is that the method is rather slow comparedwith the state of art methods like CVD, PECVD and PVD. Nevertheless, due to the outstandingproperties of the ALD technique, the drawback of slow deposition rate may be balanced by theparallel processing of many wafers in semiconductor furnaces, as described here
Type of Medium:
Electronic Resource
URL:
http://www.tib-hannover.de/fulltexts/2011/0528/02/18/transtech_doi~10.4028%252Fwww.scientific.net%252FMSF.573-574.181.pdf
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