ISSN:
1573-0727
Keywords:
delay test generation
;
hierarchical testing
;
path selection
Source:
Springer Online Journal Archives 1860-2000
Topics:
Electrical Engineering, Measurement and Control Technology
Notes:
Abstract Delay testing is used to detect timing errors in a digital circuit.In this paper, we report a tool called MODET forautomatic test generation for path delay faults in modular combinational circuits. Our technique usesprecomputed robust delay tests for individual modules to computerobust delay tests for the module-level circuit. We present alongest path theorem at the module level ofabstraction which specifies the requirements for path selectionduring delay testing. Based on this theorem, we propose a pathselection procedure in module-level circuits and report efficientalgorithms for delay test generation. MODET hasbeen tested against a number of hierarchical circuits with impressivespeedups in relation to gate-level test generation.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1023/A:1008267608838
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