ISSN:
1662-9779
Source:
Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
Topics:
Physics
Notes:
In order to obtain high yields during IC manufacturing, particles - added during layer deposition,etching … - have to be removed. In order to meet the stringent requirements set by the ITRSroadmap, this cleaning has to occur with minimal substrate etching. This necessitates the use ofphysically-assisted particle-removal techniques, e.g. megasonic cleaning. These methods are usuallyevaluated on blanket wafers. However, many cleaning steps occur on patterned wafers. The goal ofthis paper is to investigate the particle removal efficiency (PRE) for patterned substrates comparedto blanket wafers. A full-wafer contamination and detection protocol was developed to evaluate theremoval efficiencies of micron-wide trenches. The student-t test reveals a significantly lower PREfor 1μm wide by 2.2 μm deep trenches versus a blanket wafer for megasonic cleaning. This isrelevant for STI cleaning and cleaning of dielectric trenches in damascene patterning
Type of Medium:
Electronic Resource
URL:
http://www.tib-hannover.de/fulltexts/2011/0528/02/24/transtech_doi~10.4028%252Fwww.scientific.net%252FSSP.134.221.pdf
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