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  • 1
    Publication Date: 2019-07-13
    Description: No abstract available
    Keywords: Electronics and Electrical Engineering
    Type: 2011 ReSpace Conference; Aug 22, 2011 - Aug 25, 2011; Albuquerque, NM; United States
    Format: text
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  • 2
    Publication Date: 2019-07-13
    Description: Accurate, on-board classification of instrument data is used to increase science return by autonomously identifying regions of interest for priority transmission or generating summary products to conserve transmission bandwidth. Due to on-board processing constraints, such classification has been limited to using the simplest functions on a small subset of the full instrument data. FPGA co-processor designs for SVM1 classifiers will lead to significant improvement in on-board classification capability and accuracy.
    Keywords: Electronics and Electrical Engineering
    Type: IEEEAC Paper 1230 , IEEE Aerospace Conference; Mar 06, 2008; Big Sky, MT; United States
    Format: text
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  • 3
    Publication Date: 2019-07-12
    Description: An effort related to that described in the preceding article focuses on developing a spaceborne processing platform for fast and accurate onboard classification of image data, a critical part of modern satellite image processing. The approach again has been to exploit the versatility of recently developed hybrid Virtex-4FX field-programmable gate array (FPGA) to run diverse science applications on embedded processors while taking advantage of the reconfigurable hardware resources of the FPGAs. In this case, the FPGA serves as a coprocessor that implements legacy C-language support-vector-machine (SVM) image-classification algorithms to detect and identify natural phenomena such as flooding, volcanic eruptions, and sea-ice break-up. The FPGA provides hardware acceleration for increased onboard processing capability than previously demonstrated in software. The original C-language program demonstrated on an imaging instrument aboard the Earth Observing-1 (EO-1) satellite implements a linear-kernel SVM algorithm for classifying parts of the images as snow, water, ice, land, or cloud or unclassified. Current onboard processors, such as on EO-1, have limited computing power, extremely limited active storage capability and are no longer considered state-of-the-art. Using commercially available software that translates C-language programs into hardware description language (HDL) files, the legacy C-language program, and two newly formulated programs for a more capable expanded-linear-kernel and a more accurate polynomial-kernel SVM algorithm, have been implemented in the Virtex-4FX FPGA. In tests, the FPGA implementations have exhibited significant speedups over conventional software implementations running on general-purpose hardware.
    Keywords: Electronics and Electrical Engineering
    Type: NPO-45961 , NASA Tech Briefs, December 2008; 9
    Format: application/pdf
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