ALBERT

Description: A graph-theoretic design process and software tool is presented for selecting a multiprocessing scheduling solution for a class of computational problems. The problems of interest are those that can be described using a dataflow graph and are intended to be executed repetitively on multiple processors. The dataflow paradigm is very useful in exposing the parallelism inherent in algorithms. It provides a graphical and mathematical model which describes a partial ordering of algorithm tasks based on data precedence.

Description: The Dataflow Design Tool is a software tool for selecting a multiprocessor scheduling solution for a class of computational problems. The problems of interest are those that can be described with a dataflow graph and are intended to be executed repetitively on a set of identical processors. Typical applications include signal processing and control law problems. The software tool implements graph-search algorithms and analysis techniques based on the dataflow paradigm. Dataflow analyses provided by the software are introduced and shown to effectively determine performance bounds, scheduling constraints, and resource requirements. The software tool provides performance optimization through the inclusion of artificial precedence constraints among the schedulable tasks. The user interface and tool capabilities are described. Examples are provided to demonstrate the analysis, scheduling, and optimization functions facilitated by the tool.

Description: NASA Lewis Research Center s Communications Technology Division has an ongoing program in the development of efficient channel coding schemes for satellite communications applications. Through a university grant, as a part of this research, the University of Toledo is investigating the performance of turbocodes, which use parallel concatenation of non-systematic convolutional encoders with an interleaver. The error correcting capacity of these codes is close to the Shannon limit. The research emphasis is on the development of low-complexity, but higher rate (greater than one half), turbocodes and on the iterative decoding of block codes.

Description: Ada is becoming an increasingly popular programming language for large Government-funded software projects. Ada with it portability, transportability, and maintainability lends itself well to today's complex programming environment. In addition, expert systems have also assumed a growing role in providing human-like reasoning capability expertise for computer systems. The integration is discussed of expert system technology with Ada programming language, especially a rule-based expert system using an ART-Ada (Automated Reasoning Tool for Ada) system shell. NASA Lewis was chosen as a beta test site for ART-Ada. The test was conducted by implementing the existing Autonomous Power EXpert System (APEX), a Lisp-based power expert system, in ART-Ada. Three components, the rule-based expert systems, a graphics user interface, and communications software make up SMART-Ada (Systems fault Management with ART-Ada). The rules were written in the ART-Ada development environment and converted to Ada source code. The graphics interface was developed with the Transportable Application Environment (TAE) Plus, which generates Ada source code to control graphics images. SMART-Ada communicates with a remote host to obtain either simulated or real data. The Ada source code generated with ART-Ada, TAE Plus, and communications code was incorporated into an Ada expert system that reads the data from a power distribution test bed, applies the rule to determine a fault, if one exists, and graphically displays it on the screen. The main objective, to conduct a beta test on the ART-Ada rule-based expert system shell, was achieved. The system is operational. New Ada tools will assist in future successful projects. ART-Ada is one such tool and is a viable alternative to the straight Ada code when an application requires a rule-based or knowledge-based approach.

Description: A graph-theoretic design process and software tool is defined for selecting a multiprocessing scheduling solution for a class of computational problems. The problems of interest are those that can be described with a dataflow graph and are intended to be executed repetitively on a set of identical processors. Typical applications include signal processing and control law problems. Graph-search algorithms and analysis techniques are introduced and shown to effectively determine performance bounds, scheduling constraints, and resource requirements. The software tool applies the design process to a given problem and includes performance optimization through the inclusion of additional precedence constraints among the schedulable tasks.

Description: The NASA Glenn Research Center through a contract with Spectrum Astro, Inc., has been developing space network hardware as an enabling technology using open systems interconnect (OSI) standards for space-based communications applications. The OSI standard is a well-recognized layered reference model that specifies how data should be sent node to node in a communications network. Because of this research and technology development, a space-qualifiable Ethernet-based network interface card (similar to the type found in a networked personal computer) and the associated four-port hub were designed and developed to flight specifications. During this research and development, there also have been many lessons learned for determining approaches for migrating existing spacecraft architectures to an OSI-network-based platform. Industry has recognized the benefits of targeting hardware developed around OSI standards such as Transmission Control Protocol/Internet Protocol (TCP/IP) or similar protocols for use in future generations of space communication systems. Some of these tangible benefits include overall reductions in mission schedule and cost and in system complexity. This development also brings us a step closer to the realization of a principal investigator on a terrestrial Internet site being able to interact with space platform assets in near real time. To develop this hardware, Spectrum Astro first conducted a technology analysis of alternatives study. For this analysis, they looked at the features of three protocol specifications: Ethernet (IEEE 802.3), Firewire (IEEE 1394), and Spacewire (IEEE 1355). A thorough analysis was performed on the basis of criteria such as current protocol performance and suitability for future space applications. Spectrum Astro also projected future influences such as cost, hardware and software availability, throughput performance, and integration procedures for current and transitive space architectures. After a thorough analysis, Ethernet was chosen because it was seen as the best longer term fit because of the prevalent commercial market; the current and projected availability of hardware, software, and development tools; and the ease of architecture integration.

Description: A graph-theoretic design process and software tool is presented for selecting a multiprocessing scheduling solution for a class of computational problems. The problems of interest are those that can be described using a dataflow graph and are intended to be executed repetitively on a set of identical parallel processors. Typical applications include signal processing and control law problems. Graph analysis techniques are introduced and shown to effectively determine performance bounds, scheduling constraints, and resource requirements. The software tool is shown to facilitate the application of the design process to a given problem.

Description: A simulator is introduced which follows the rules of the enhanced Algorithm to Architecture Mapping Model (ATAMM) multiprocessing strategy. ATAMM is a method for embedding an algorithm into a multiprocessing system in addition to providing system performance prediction capabilities. A discussion of the inner workings of the Architecture Design and Assessment System (ADAS) hosted simulator is introduced to illustrate how the simulator follows the ATAMM rule set. A sample 5-node algorithm graph is given as an example to illustrate: (1) entering of a graph into the simulator and how to run the graph using a graph entry tool; (2) how to analyze the data; and (3) a comparison of the simulation results with the predicted results from ATAMM.

Description: ATAMM (Algorithm To Architecture Mapping Model) enhancement and multiprocessor performance evaluation is discussed. The following topics are included: the ATAMM model; ATAMM enhancement; ADM (Advanced Development Model) implementation of ATAMM; and ATAMM support tools.