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  • COMMUNICATIONS AND RADAR  (1)
  • Computer facility  (1)
  • 1
    Electronic Resource
    Electronic Resource
    Springer
    Fire technology 22 (1986), S. 14-32 
    ISSN: 1572-8099
    Keywords: Computer facility ; fire loss ; fire protection ; halon ; smoke detectors ; VESDA ; nephelometer ; airflow effects ; spacing ; smoldering ; duct sampling ; pipework sampling
    Source: Springer Online Journal Archives 1860-2000
    Topics: Architecture, Civil Engineering, Surveying
    Notes: Abstract A recent fire in a computer center in Canberra, Australia, prompted an investigation of the installed smoke detection system. The opportunity was also taken to evaluate alternate detection equipment in the actual center under operational conditions. One device tested was VESDA, a new highly sensitive smoke detector developed in Australia for clean occupancies such as computer rooms and telephone exchanges. Details of the test program and the effects of high room airflows on all forms of detectors are presented. The effectiveness of VESDA in giving very early warning of fire is demonstrated.
    Type of Medium: Electronic Resource
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  • 2
    Publication Date: 2019-06-28
    Description: A jointly optimized coded modulation system is described which was designed, built, and tested by COMSAT Laboratories for NASA LeRC which provides a bandwidth efficiency of 2 bits/s/Hz at an information rate of 160 Mbit/s. A high speed rate 8/9 encoder with a Viterbi decoder and an Octal PSK modem are used to achieve this. The BER performance is approximately 1 dB from the theoretically calculated value for this system at a BER of 5 E-7 under nominal conditions. The system operates in burst mode for downlink applications and tests have demonstrated very little degradation in performance with frequency and level offset. Unique word miss rate measurements were conducted which demonstrate reliable acquisition at low values of Eb/No. Codec self tests have verified the performance of this subsystem in a stand alone mode. The codec is capable of operation at a 200 Mbit/s information rate as demonstrated using a codec test set which introduces noise digitally. The measured performance is within 0.2 dB of the computer simulated predictions. A gate array implementation of the most time critical element of the high speed Viterbi decoder was completed. This gate array add-compare-select chip significantly reduces the power consumption and improves the manufacturability of the decoder. This chip has general application in the implementation of high speed Viterbi decoders.
    Keywords: COMMUNICATIONS AND RADAR
    Type: NASA-CR-185149 , NAS 1.26:185149 , CTD-90/022
    Format: application/pdf
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