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  • Springer  (5)
  • 1
    Electronic Resource
    Electronic Resource
    Minimum parasitic effects biquadratic OTA-C filter architectures (1991)
    Springer
    Analog integrated circuits and signal processing 1 (1991), S. 297-319 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper presents a systematic analysis to determine the tuning range limitations of biquadratic OTAC filter architectures, as well as a strategy for the selection of minimum parasitic effects filter structures for a given transfer function (filter type). The analysis uses an OTA macromodel that includes finite input and output impedances along with frequency-dependent transconductance. Experimental data of the macromodel parameters of real OTAs along with analytical results are used to estimate the practical tuning (bounds) limitations of the different biquadratic filter structures. Some of the available transfer functions from these filter architectures present minimum parasitic effects. Experimental results from CMOS chip tests showed agreement with the minimum parasitic effects theoretical results.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1007/BF00239678
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    Paper (German National Licenses)
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  • 2
    Electronic Resource
    Electronic Resource
    Learning on Silicon: Editorial (1999)
    Springer
    Analog integrated circuits and signal processing 18 (1999), S. 113-116 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008363802540
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  • 3
    Electronic Resource
    Electronic Resource
    A CMOS Four Quadrant Current/Transconductance Multiplier (1999)
    Springer
    Analog integrated circuits and signal processing 19 (1999), S. 163-168 
    Details
    ISSN: 1573-1979
    Keywords: analog integrated circuits ; analog multipliers
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based on the square-law characteristic of MOS transistors in saturation region. Experimental results for 2 μm CMOS technology are provided.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008310017048
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  • 4
    Electronic Resource
    Electronic Resource
    A Modular Analog NLMS Structure for Adaptive Filtering (1999)
    Springer
    Analog integrated circuits and signal processing 21 (1999), S. 127-142 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper proposes a modular Analog Adaptive filter (AAF) algorithm, in which the coefficient adaptation is carried out by using a time varying step size analog normalized LMS (NLMS) algorithm, which is implemented as an external analog structure. The proposed time varying step size is estimated by using the first element of the crosscorrelation vector between the output error and reference signal, and the first element of the crosscorrelation vector between the output error and the adaptive filter output signal, respectively. Proposed algorithm reduces distortion when additive noise power increases or DC offsets are present, without significatively decreasing the convergence rate nor increasing the complexity of the conventional NLMS algorithms. Simulation results show that proposed algorithm improves the performance of AAF when DC offsets are present. The proposed VLSI structure for the time varying step size normalized NLMS algorithm has, potentially, a very small size and faster convergence rates than its digital counterparts. It is suitable for general purpose applications or oriented filtering solution such as echo cancellation and equalization in cellular telephony in which high performance, low power consumption, fast convergence rates and small size adaptive digital filters (ADF) are required. The convergence performance of analog adaptive filters using integrators like first order low pass filter is analyzed.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008313522563
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  • 5
    Electronic Resource
    Electronic Resource
    OTA-C biquad-based filter silicon compiler (1993)
    Springer
    Analog integrated circuits and signal processing 3 (1993), S. 243-258 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract An integrated software system that facilitates the design, and integrated-circuit layout of continuous-time OTA-C filter biaquad-based structures with typical cutoff frequenceis for a 3µm technology in the 500 kHz-8 MHz range is described. The proposed integrated software system consists of three separate software modules written in the C language for the Apollo workstation (DN3000). The first module is a general filter approximation package. This program can approximate conventional magnitude, arbitrary magnitude, arbitrary group delay equalizer, arbitrary magnitude with group delay specifications. The second module aides in the synthesis of the biquad-based OTA-C filter structures. This module is unique in that the C code has the rule-based language CLIPS embedded within the code, and takes into account OTA-C filter nonidealities. An expert system using CLIPS was developed to select an appropriate OTA-C filter structure based on the nonidealities of the structures. After the filter structure has been chosen, the program will guide the user in the calculation of the capacitor values. These calculations are based on the nonidealities of the OTAs included in the standard cell library for layout, in addition the design of special purpose OTA as another alternative is also considered. Furthermore, the program will develop the necessary input files for the layout generator. The final module is a modified version of AIDE2, a standard cell layout generator for switched-capacitor circuits. The input files to the modified AIDE2 is a C language program that describes the circuit (i.e., standard cells and their netlist). The output file is a CALTECH Intermediate Format (CIF) file that is required for fabrication.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1007/BF01239364
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