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Implementing a bubble memory hierarchy system (1979)

Nichols, C. D. ; Segura, R.

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Publication Date: 2019-07-13

Description: This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Keywords: COMPUTER OPERATIONS AND HARDWARE

Type: Institute of Electrical and Electronics Engineers and American Institute of Physics, Joint Intermag-Magnetism and Magnetic Materials Conference; Jul 17, 1979 - Jul 20, 1979; New York, NY

Format: text

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