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  • Other Sources  (36)
  • ELECTRONICS AND ELECTRICAL ENGINEERING  (36)
  • 1975-1979  (36)
  • 1945-1949
  • 1
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    Formulation of a methodology for power circuit design optimization (1976)
    In:  Other Sources
    Details
    Publication Date: 2019-07-13
    Description: A methodology for optimizing power-processor designs is described which achieves optimization with respect to some power-processor characteristic deemed particularly desirable by the designer, such as weight or efficiency. Optimization theory based on Lagrange multipliers is reviewed together with nonlinear programming techniques employing penalty functions. The methodology, the task of which is to minimize an objective function subject to design constraints, is demonstrated with the aid of four examples: optimum-weight core selection for an inductor with a predetermined winding size, optimum-weight inductor design with a given loss constraint, optimum-loss inductor design with a given weight constraint, and a comparison of optimum-weight single- and two-stage input-filter designs with identical loss and other requirement constraints. Closed-form solutions for the first three examples are obtained by applying the Lagrange-multiplier method, but solutions for the last example are found numerically through the use of the sequential unconstrained minimization technique.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: Power Electronics Specialists Conference; Jun 08, 1976 - Jun 10, 1976; Cleveland, OH
    Format: text
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    NASA TECHNICAL REPORTS
  • 2
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    Modeling of switching regulator power stages with and without zero-inductor-current dwell time (1979)
    In:  Other Sources
    Details
    Publication Date: 2019-06-27
    Description: State-space techniques are employed to derive accurate models for the three basic switching converter power stages: buck, boost, and buck/boost operating with and without zero-inductor-current dwell time. A generalized procedure is developed which treats the continuous-inductor-current mode without dwell time as a special case of the discontinuous-current mode when the dwell time vanishes. Abrupt changes of system behavior, including a reduction of the system order when the dwell time appears, are shown both analytically and experimentally. Merits resulting from the present modeling technique in comparison with existing modeling techniques are illustrated.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: IEEE Transactions on Industrial Electronics and Control Instrumentation; IECI-26; Aug. 197
    Format: text
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    NASA TECHNICAL REPORTS
  • 3
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    Velocity overshoot effect on a short-gate microwave MESFET (1979)
    In:  Other Sources
    Details
    Publication Date: 2019-06-27
    Description: The device parameters of short-gate GaAs and InP FETs have been found to be dependent on the nonequilibrium velocity overshoot phenomenon. Both saturation velocity and critical field are found to be larger for shorter gates. The v-E characteristics of Pucel et al. (1975) are modified. The cutoff frequency and other parameters for GaAs, InP, and Si are given as a function of gate length and bias. The cutoff frequency of InP MESFETs with a doping density of 10 to the 17th per cu cm is only 20% higher than those of equivalent GaAs MESFETs at 300 K. Comparison with other work is also presented.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: International Journal of Electronics; 47; July 197
    Format: text
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    NASA TECHNICAL REPORTS
  • 4
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    Development of a standardized control module for dc-to-dc converters (1977)
    In:  CASI
    Details
    Publication Date: 2019-06-27
    Description: The electrical performance of a power processor depends on the quality of its control system. Most of the existing control circuits suffer one or more of the following imperfections that tend to restrict their respective utility: (1) inability to perform different modes of duty cycle control; (2) lack of immunity to output filter parameter changes, and (3) lack of capability to provide power component stress limiting on an instantaneous basis. The three lagging aspects of existing control circuits have been used to define the major objectives of the current Standardized Control Module (SCM) Program. Detailed information on the SCM functional block diagram, its universality, and performance features, circuit description, test results, and modeling and analysis efforts are presented.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: NASA-CR-135072 , TRW-26629.000
    Format: application/pdf
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    NASA TECHNICAL REPORTS
  • 5
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    Modeling and analysis of Power Processing Systems (1979)
    In:  Other Sources
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    Publication Date: 2019-07-13
    Description: The paper deals with a NASA-sponsored, computer-based program Modeling and Analysis of Power Processing Systems (MAPPS). Three major MAPPS subprograms, Design Optimization, Control Design, and Performance Analysis are considered. The program makes it possible to reduce the design, analysis, and development time, and thus the cost, in achieving the required performance for power processing equipment and systems.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: PESC ''79; Jun 18, 1979 - Jun 22, 1979; San Diego, CA
    Format: text
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    NASA TECHNICAL REPORTS
  • 6
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    Power converter design optimization (1977)
    In:  Other Sources
    Details
    Publication Date: 2019-07-13
    Description: Utilizing the demonstrated capability of nonlinear programming algorithms, a practical design optimization approach for power converters is established to conceive a design to meet all power-circuit performance requirements and concurrently optimize a defined quantity such as weight or losses. In addition, to facilitate a cost-effective design, the computer-aided approach provides a means to readily assess (1) the weight-efficiency tradeoff, (2) impacts of converter requirements and component characteristics on a given design, and (3) optimum power system configurations.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: Power Electronics Specialists Conference; Jun 14, 1977 - Jun 16, 1977; Palo Alto, CA
    Format: text
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    NASA TECHNICAL REPORTS
  • 7
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    Parametric amplification and oscillation at 36 GHz using a point-contact Josephson junction (1977)
    In:  Other Sources
    Details
    Publication Date: 2011-08-17
    Description: The paper reports observation of doubly degenerate parametric amplification and oscillation at 36 GHz from a single point-contact Josephson junction. The experimental results agree qualitatively with theoretical calculations based on the resistively shunted junction model. The estimated noise temperature of an amplifier with 11 dB net gain is consistent with zero, but has an upper limit of 50 K. Attempts to observe parametric amplification in the singly degenerate mode with a pump frequency of 72 GHz were not successful.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: Journal of Applied Physics; 48; Mar. 197
    Format: text
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    NASA TECHNICAL REPORTS
  • 8
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    A sub-nanosecond CCD (1976)
    In:  Other Sources
    Details
    Publication Date: 2011-08-17
    Description: A 32-cell silicon n-channel PCCD was fabricated and tested for charge transfer efficiency versus transfer time. A charge transfer time of 550 picoseconds with a 0.9998 transfer efficiency was obtained when operated in the uni-phase mode. These conditions correspond to an operating rate of 900 MHz when operated as an analog data or digital device.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: JPL Conf. on Charge-Coupled Device Technol. and Appls.; p 89-94
    Format: text
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    NASA TECHNICAL REPORTS
  • 9
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    LaF3 insulators for MIS structures (1979)
    In:  Other Sources
    Details
    Publication Date: 2011-08-17
    Description: Thin films of LaF3 deposited on Si or GaAs substrates have been observed to form blocking contacts with very high capacitances. This results in comparatively hysteresis-free and sharp C-V (capacitance-voltage) characteristics for MIS structures. Such structures have been used to study the interface states of GaAs with increased resolution and to construct improved photocapacitive infrared detectors.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: Applied Physics Letters; 34; June 1
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    NASA TECHNICAL REPORTS
  • 10
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    Nondestructive determination of the depth of planar p-n junctions by scanning electron microscopy (1977)
    In:  Other Sources
    Details
    Publication Date: 2011-08-17
    Description: A method was developed for measuring nondestructively the depth of planar p-n junctions in simple devices as well as in integrated-circuit structures with the electron-beam induced current (EBIC) by scanning parallel to the junction in a scanning electron microscope (SEM). The results were found to be in good agreement with those obtained by the commonly used destructive method of lapping at an angle to the junction and staining to reveal the junction.
    Keywords: ELECTRONICS AND ELECTRICAL ENGINEERING
    Type: IEEE Transactions on Electron Devices; ED-24; Dec. 197
    Format: text
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