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A bubble memory module (1980)

Stermer, R. L., Jr. ; Hayes, P. J. ; Segura, R. ; [et al.]

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Publication Date: 2019-07-13

Description: A bubble memory module design providing flexibility for many user applications in spacecraft data recording is described. The memory module can be used with user-designed controllers with the memory organization determined by the application. Asynchronous data rates from zero to 1.33 Mbits/sec at minimum power are accomplished by using 8-chip memory cells with 100 K bit serial chips. The memory module is expandable from a 4 x 2 cell matrix to a 4 x 16 cell matrix corresponding to an expandable capacity of 6.55 M to 52.4 M bits. The module's design, utility in various memory systems, and user clocking scheme are described.

Keywords: COMPUTER OPERATIONS AND HARDWARE

Type: International Magnetics Conference; Apr 21, 1980 - Apr 24, 1980; Boston, MA

Format: text

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