Publication Date:
2016-06-07
Description:
A new logic simulator that was developed at the NASA Space Engineering Research Center for VLSI Design was described. The simulator is multi-level, being able to simulate from the switch level through the functional model level. NOVA is currently in the Beta test phase and was used to simulate chips designed for the NASA Space Station and the Explorer missions. A new algorithm was devised to simulate bi-directional pass transistors and a preliminary version of the algorithm is presented. The usage of functional models in NOVA is also described and performance figures are presented.
Keywords:
COMPUTER OPERATIONS AND HARDWARE
Type:
The 2nd 1990 NASA SERC Symposium on VLSI Design; 13 p
Format:
application/pdf
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