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Turn-on delay of a Josephson junction

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Abstract

An attempt has been made to give a new definition of turn-on delay of a Josephson junction which differs from earlier works. On the basis of our definition, an analytical expression of turn-on delay has been developed. This analytical model is based on a concept inherently different from those of Harris and McDonaldet al. It is observed that based on our model, the analytical expression of McDonaldet al. can also be obtained. A comparative study between our turn-on delay and those of Harris and McDonaldet al. is also made. It is expected that our definition and analytical expression of turn-on delay will eliminate the drawbacks and confusions of earlier investigations. The present work will find use in critically ascertaining the switching speed of Josephson analogs and digital circuits.

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Authors and Affiliations

  1. Department of Physics and Meteorology, Indian Institute of Technology, Kharagpun, India

    K. Srinivas

  2. Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India

    J. C. Biswas

Authors
  1. K. Srinivas
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  2. J. C. Biswas
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Srinivas, K., Biswas, J.C. Turn-on delay of a Josephson junction. J Low Temp Phys 74, 407–415 (1989). https://doi.org/10.1007/BF00682666

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  • DOI: https://doi.org/10.1007/BF00682666

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