ISSN:
1662-9779
Source:
Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
Topics:
Physics
Notes:
3D architecture is an alternative way to high-k dielectric to increase the capacitance of MIMstructure. However, the top of this kind of structure is very sensitive to defectivity and then requiresa special wet treatment. In this paper, we present the process flow for a 3D MIM integration in aCMOS copper back-end and a two steps wet process which provides very good electricalperformances, i.e. leakage current lower than 10-9A.cm-2 at 5V / 125°C and breakdown voltagehigher than 20V. At first, a SC1 step is done for electrode isolation improvement by materialetching with good selectivity towards dielectric: that’s the electrode recess. In the second time, a HFstep is done for copper oxide dilution and residues removal from the top of the 3D structure
Type of Medium:
Electronic Resource
URL:
http://www.tib-hannover.de/fulltexts/2011/0528/02/24/transtech_doi~10.4028%252Fwww.scientific.net%252FSSP.134.379.pdf
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