ALBERT

Notes: A detailed investigation of the electrical properties of metal-oxide-semiconductor (MOS) transistors with gate oxides nitrided for long (3 h) and short (40 min) times has been conducted as a function of temperature (4.2–300 K). The nitrided oxides (NO) and Re-oxidized-nitrided oxides devices have been fabricated using a low pressure plasma enhanced nitridation in ammonia. The P- and N- channel MOS transistors parameters, such as the threshold voltage, maximum mobility, mobility attenuation factor, and subthreshold slope have been extracted from the ohmic transfer characteristics. The negative shift of the threshold voltage due to the nitridation-induced positive charge has been found to be independent of temperature for N-channel devices, whereas it decreases at low temperature for P-channel devices. A more pronounced decrease of the interface state density (measured from the subthreshold slope) after nitridation has been found for P-channel devices at low temperature. This feature corresponds to a reduction of the donorlike interface state density near valence band and is responsible for a partial compensation of the nitridation-induced positive charge in P-channel devices. The mobility data of N-channel devices clearly show that the nitrogen incorporation close to the interface results mainly in a higher Coulomb scattering rate, whose coefficient found around 3300 and 1200 V s/C, depending on nitridation dose, is practically independent of temperature.The corresponding mobility attenuation factor θ is also found to decrease after nitridation. The N-channel crossing of the transconductance characteristics at high gate voltage, associated with the θ decrease after nitridation, cannot be completely explained by the influence of the nitridation-induced fixed positive charge. It seems rather that the nitridation-induced modification of the Si/SiO2 interface gives rise to a drastic reduction of the surface roughness related scattering mechanism. This θ reduction due to the nitridation process is shown to be maintained in the whole temperature range studied for both lightly and strongly nitrided oxides. However, the reduction of the maximum mobility after nitridation is rather weak for lightly nitrided oxides, even at low temperature. In the case of P-channel devices, a very different behavior is found. For strongly nitrided oxides, both peak and high gate voltage transconductance decrease with a more pronounced difference between nitrided and non-nitrided devices as the temperature is lowered. For lightly nitrided oxides, the low and high field transconductance have been found to remain very comparable to those of non-nitrided devices. This preservation of hole transport properties may be related to the substantial reduction of interface trap density close to the valence band observed after plasma nitridation, which partly compensates the excess of positive fixed charge. Furthermore, the overall reduction of the interface trap density after plasma nitridation, which results in smaller subthreshold swings for N- and P-type devices, is expected to be very promising for a better threshold voltage optimization at cryogenic temperatures.

Notes: The effects of high-dose silicon and arsenic ion implantation on the electrical and structural properties of silicon layers are investigated. Combining electrical, transmission electron microscopy, and triple-crystal x-ray-diffraction measurements made it possible to characterize the effects of thermal annealing both on defect annihilation mechanisms and on electrical doping activation. It is clearly shown that a low-temperature (≤450 °C) electrical activation process is taking place in the amorphous surface layer induced by high-dose ion implantation. This phenomenon is found to be completely independent of the recrystallization regrowth by solid phase epitaxy which occurs at higher temperature. This electrical activation process is found to be well described by a local relaxation model involving point defect migration.

Notes: An analytical model and experimental results are proposed to account for the floating body effects in SOI (silicon-on-insulator) MOSFETs (metal-oxide-semiconductor field-effect transistors). The model enables a quantitative description of hysteresis effects in the static characteristics and shows a strong correlation between the conductance and transconductance. It is demonstrated that an SOI MOSFET may exhibit both a negative conductance and a negative transconductance. A short-channel device may be biased in such a way that a critical phenomenon, comparable to a second-order phase transition, takes place. The major parameters and applications of these critical effects are described in detail.

Notes: An analysis of silicon metal-oxide-semiconductor (MOS) transistor operation at liquid-helium temperature is presented. More specifically, analytical models providing the drain current and transconductance characteristics in the linear and nonohmic regions are established in the presence of source-drain series resistances. These models, which rely on a specific mobility law for very low temperature, enable a good description of MOS transistor operation to be obtained. They permit the understanding and the prediction of the effects of source-drain series resistance both in the linear and nonlinear regions. Furthermore, they allow a suitable parameter extraction method to be developed for the liquid-helium temperature range. In addition, peculiarities of the drain voltage dependence of the mobility at low longitudinal electric field are also pointed out and empirically accounted for in the modeling of the output characteristics.

Notes: The impact of the oxide reliability on the endurance performance of nonvolatile memories [electrically erasable read only memories (EEPROMs)] is analyzed quantitatively. The degradation rate of tunnel SiO2 layers as obtained from EEPROM cells as well as tunnel oxide capacitors subjected to different modes of electrical stress (write/erase operations, static and dynamic stress) are compared and attributed to a specific charge generation mechanism. Furthermore, a reliability criterion for the optimization of the tunnel oxide technology entering the fabrication of EEPROM cells is also proposed.

Notes: New models for the characterization of volume traps in enhancement-mode field-effect transistors by current deep level transient spectroscopy are proposed. First, a simple model that is based on the use of the experimentally measured transconductance of the device is studied. Consequently it includes, in principle, the dependence of the mobility with gate bias and therefore allows us to avoid any approximation in the gate voltage dependence of the mobility. Different improvements of this first model are then proposed, compared, and discussed with respect to previous works. Finally a more complete model that requires less approximations is derived. These different approaches are finally used for the characterization of a deep trap in a bulk enhancement-mode field-effect transistor.

Notes: An approach giving a physical understanding of the stress-induced leakage current (SILC) generation kinetics based on anode hole injection and hole dispersive transport in the oxide is presented. It is shown that the SILC is not directly correlated to the defects responsible for oxide breakdown. However, it is suggested that trapped holes can impact on the defect creation rate and, in turn, on the breakdown generation. © 2000 American Institute of Physics.

Notes: A fast method for extracting the interface trap density profile of the semiconductor-insulator interface in metal-insulator-semiconductor structures is proposed. The method is based on the well known conductance technique and extracts the interface state density profile from the maximums of the parallel conductance versus applied gate bias curves, Gp(Va). In addition, this method is directly applicable to fully automated experimental setups available in industrial environments.

Notes: A comprehensive study of the temperature dependence of the Fowler–Nordheim (F–N) tunnel emission in a metal-oxide-semiconductor structure is conducted both theoretically and experimentally. The theoretical variations with temperature of the F–N emission is analyzed both for metallic and degenerate semiconductor cathode materials. The influence of the electron concentration of a degenerate semiconductor on the amplitude of the F–N current is demonstrated. A new analytical formula for the F–N current temperature dependence is derived from the exact expressions using the Sommerfeld expansion. This new analytical approximation proves to be much more efficient than the previous analytical formula developed by Good and Müller [Field Emission, Handbuch der Physik, Vol. 21 (Springer, Berlin, 1956)] and may be very useful for F–N current computer-aided-design-oriented numerical simulation. The experimental study of the F–N current in MOS capacitors clearly demonstrates the strong impact of temperature on the F–N emission above 250 °C. It is also shown that the pre-exponential and the exponential F–N coefficients can still be determined as a function of temperature. The relative variation with temperature of the experimental F–N current data can be well interpreted by the exact F–N emission formula provided that the temperature dependence of the semiconductor (metal) -oxide barrier height Φb is well accounted for by a quasilinear function of temperature. The absolute amplitude of the F–N current can also be satisfactorily predicted by the exact F–N theory while adjusting the semiconductor electron concentration. © 1995 American Institute of Physics.

Notes: A new model for the low frequency (LF) noise in the base current of polysilicon emitter bipolar junction transistors (BJTs) is proposed. This model is based on the carrier number fluctuation approach and satisfactorily accounts for the base current noise characteristics. The base current fluctuations are ascribed to surface and volume noise sources. The surface noise arises from the low frequency fluctuations of the surface generation–recombination base current component due to the dynamic trapping–detrapping of carriers into/from slow states located in the spacer oxide at the periphery of the emitter/base junction. The volume noise results from the intrinsic fluctuations of the diffusion base current due to the carrier number fluctuations in the emitter or at the emitter–base junction. This LF noise model has been applied to BJTs subjected to hot carrier stress after reverse biasing of the base–emitter junction. The evolution of the base current noise characteristics after stress clearly demonstrates that the hot carrier injection leads to a substantial increase of the surface base current noise component whereas the volume noise component as well as the collector current noise is nearly insensitive to the degradation-induced defects. The application of the model provides an evaluation of the slow and fast trap densities generated as a function of the stress level. © 1996 American Institute of Physics.